*May 06, 2013
*ECN S13-0982, Rev. B
*File Name: SiR470DP_PS.txt, SiR470DP_PS.lib
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT SiR470DP D G S 
M1 3 GX S S NMOS W= 13795655u L= 0.25u 
M2 S GX S D PMOS W= 13795655u L= 2.471e-07 
R1 D 3 1.737e-03 TC=4.746e-03, 1.052e-05 
CGS GX S 3.214e-09 
CGD GX D 3.056e-11 
RG G GY 1
RTCV 100 S 1e6 TC=5.405e-04, 4.537e-06 
ETCV GX GY 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD S D DBD 
**************************************************************** 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 5e-8 
+ RS = 0 KP = 1.726e-05 NSUB = 2.839e+17 
+ KAPPA = 1e-2 ETA = 1e-4 NFS = 8e11 
+ XJ = 5e-7 LD = 0 IS = 0 TPG = 1) 
*************************************************************** 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 5e-8 
+NSUB = 1.917e+16 IS = 0 TPG = -1 ) 
**************************************************************** 
.MODEL DBD D ( 
+FC = 0.1 TT = 2.74e-08 T_MEASURED = 25 BV = 41 
+RS = 1.097e-03 N = 1.079e+00 IS = 2.672e-11 
+EG = 1.177e+00 XTI = 4.847e-01 TRS1 = 8.754e-04 
+CJO = 2.000e-09 VJ = 9.000e-01 M = 4.759e-01 ) 
.ENDS 
