*Apr 01, 2013
*ECN S13-0701, Rev. B
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT SiR414DP D G S 
M1 3 GX S S NMOS W= 11965034u L= 0.25u 
M2 S GX S D PMOS W= 11965034u L= 2.098e-07 
R1 D 3 7.2e-04 1.331e-02 3.332e-05 
CGS GX S 2.952e-09 
CGD GX D 7.401e-11 
RG G GY 0.70 
RTCV 100 S 1e6 3.530e-04 7.859e-07 
ETCV GX GY 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD S D DBD 
**************************************************************** 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 5e-8 
+ RS = 1.126e-03 KP = 9.984e-06 NSUB = 8.006e+16 
+ KAPPA = 1.756e-04 ETA = 7.792e-07 NFS = 3.715e+11 
+ LD = 0 IS = 0 TPG = 1) 
*************************************************************** 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 5e-8 
+NSUB = 1.438e+16 IS = 0 TPG = -1 ) 
**************************************************************** 
.MODEL DBD D ( 
+FC = 0.1 TT = 2.480e-08 TREF = 25 BV = 41 
+RS = 1.021e-03 N = 1.144e+00 IS = 1.719e-10 
+EG = 1.166e+00 XTI = 7.479e-01 TRS = 1.476e-03 
+CJO = 2.000e-09 VJ = 9.000e-01 M = 4.897e-01 ) 
.ENDS 
