*Apr 01, 2013
*ECN S13-0704, Rev. B
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT SiR404DP D G S 
M1 3 GX S S NMOS W= 13795655u L= 0.25u 
M2 S GX S D PMOS W= 13795655u L= 1.848e-07 
R1 D 3 7.000e-04 6.937e-03 8.863e-06 
CGS GX S 5.087e-09 
CGD GX D 2.924e-10 
RG G GY 1 
RTCV 100 S 1e6 2.582e-04 -3.023e-07 
ETCV GX GY 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD S D DBD 
**************************************************************** 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 3e-8 
+ RS = 5.187e-04 KP = 2.928e-05 NSUB = 9.788e+16 
+ KAPPA = 1.000e-06 ETA = 4.653e-05 NFS = 4.593e+11 
+ LD = 0 IS = 0 TPG = 1) 
*************************************************************** 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 3e-8 
+NSUB = 3.435e+16 IS = 0 TPG = -1 ) 
**************************************************************** 
.MODEL DBD D ( 
+FC = 0.1 TT = 1.910e-08 TREF = 25 BV = 22 
+RS = 1.594e-03 N = 1.098e+00 IS = 8.492e-10 
+EG = 1.008e+00 XTI = 2.006e-01 TRS = 1.000e-05 
+CJO = 2.000e-09 VJ = 9.000e-01 M = 2.357e-01 ) 
.ENDS 
