*May 20, 2013
*ECN S13-1169, Rev. B
*File Name: SiR422DP_PS.txt and SiR422DP_PS.lib
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet.  Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT SiR422DP D G S 
M1 3 GX S S NMOS W= 4003899u L= 0.25u 
M2 S GX S D PMOS W= 4003899u L= 2.884e-07 
R1 D 3 4.815e-03 TC=6.773e-03 1.956e-05 
CGS GX S 1.113e-09 
CGD GX D 1.026e-11 
RG G GY 0.80 
RTCV 100 S 1e6 TC=3.299e-04 -8.364e-08 
ETCV GX GY 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD S D DBD 
**************************************************************** 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 5e-8 
+ RS = 5.351e-04 KP = 2.943e-05 NSUB = 1.192e+17 
+ KAPPA = 1.000e-06 ETA = 1.067e-06 NFS = 6.312e+11 
+ LD = 0 IS = 0 TPG = 1) 
*************************************************************** 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 5e-8 
+NSUB = 2.525e+16 IS = 0 TPG = -1 ) 
**************************************************************** 
.MODEL DBD D ( 
+FC = 0.1 TT = 1.093e-08 T_MEASURED = 25 BV = 42 
+RS = 1.636e-03 N = 1.139e+00 IS = 3.280e-11 
+EG = 1.093e+00 XTI = 2.937e+00 TRS1 = 5.039e-04 
+CJO = 8.653e-10 VJ = 9.000e-01 M = 5.484e-01 ) 
.ENDS 
