*Apr 22, 2013
*ECN S13-0821, Rev. B
*File Name: SiR412DP_PS.txt and SiR412DP_PS.lib
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet.  Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT SiR412DP D G S 
M1 3 GX S S NMOS W= 1457297u L= 0.25u 
M2 S GX S D PMOS W= 1457297u L= 3.187e-07 
R1 D 3 3.696e-03 TC=1.023e-02 2.222e-05 
CGS GX S 3.963e-10 
CGD GX D 2.457e-11 
RG G GY 2.7 
RTCV 100 S 1e6 TC=-3.238e-04 -7.209e-07 
ETCV GX GY 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD S D DBD 
**************************************************************** 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 7e-8 
+ RS = 5.282e-03 KP = 1.89e-05 NSUB = 4.023e+16 
+ KAPPA = 1.783e-06 ETA = 1.492e-07 NFS = 5.396e+11 
+ LD = 0 IS = 0 TPG = 1) 
*************************************************************** 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 7e-8 
+NSUB = 1.263e+16 IS = 0 TPG = -1 ) 
**************************************************************** 
.MODEL DBD D ( 
+FC = 0.1 TT = 8.312e-09 T_MEASURED = 25 BV = 26 
+RS = 5.150e-03 N = 1.139e+00 IS = 2.496e-11 
+EG = 9.415e-01 XTI = 7.183e+00 TRS1 = 1.000e-05 
+CJO = 3.784e-10 VJ = 6.881e-01 M = 3.755e-01 ) 
.ENDS 
