********************************
* Copyright:                   *
* Vishay Intertechnology, Inc. *
********************************
*May 22, 2017
*ECN S17-0800, Rev. A
*File Name: SiRA26DP_PS.txt and SiRA26DP_PS.lib
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT SiRA26DP D G S 
M1 3 GX S S NMOS W= 5065000u L= 0.30u 
M2 S GX S D PMOS W= 5065000u L= 0.1u 
R1 D 3 1.806e-03 TC=2.906e-03,1.033e-05
CGS GX S 1.101e-09 
CGD GX D 1.008e-13 
RG G GY 1m 
RTCV 100 S 1e6 TC=1.055e-04,0.145e-06
ETCV GX GY 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD S D DBD 5065000u 
**************************************************************** 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 4e-8 
+ RS = 0 KP = 1.817e-05 NSUB = 1.504e+17 
+ KAPPA = 1.055e-01 NFS = 1.020e+11 
+ LD = 0 IS = 0 TPG = 1    )
*************************************************************** 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 4e-8 
+NSUB = 7.479e+16 IS = 0 TPG = -1    )
**************************************************************** 
.MODEL DBD D ( 
+FC = 0.1 TT = 4.713e-08 T_measured = 25 BV = 26
+RS = 4.791e-03 N = 1.110e+00 IS = 3.461e-12 
+EG = 1.139e+00 XTI = 3.288e-01 TRS1 = 7.017e-05
+CJO = 3.402e-10 VJ = 2.994e+00 M = 6.809e-01 ) 
.ENDS 
