********************************
* Copyright:                   *
* Vishay Intertechnology, Inc. *
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*Jul 20, 2015
*ECN S15-1637, Rev. A
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT SQS850EN D G S 
M1 3 GX S S NMOS W= 3946568u L= 0.30u 
M2 S GX S D PMOS W= 3946568u L= 0.23u 
R1 D 3 1.566e-02 6.644e-03 1.841e-05 
CGS GX S 8.681e-10 
CGD GX D 1.501e-11 
RG G GY 1m 
RTCV 100 S 1e6 1.357e-04 -2.122e-07 
ETCV GX GY 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD S D DBD 3946568u 
******************************************************* 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 5e-8 
+ RS = 0 KP = 7.030e-06 NSUB = 1.565e+17 
+ KAPPA = 8.659e-01 NFS = 1.000e+12 
+ LD = 0 IS = 0 TPG = 1 CAPOP = 12 ) 
*******************************************************  
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 5e-8 
+NSUB = 6.925e+15 IS = 0 TPG = -1 CAPOP = 12 ) 
******************************************************* 
.MODEL DBD D ( 
+FC = 0.1 TT = 1.013e-08 TREF = 25 BV = 61 
+RS = 2.010e-02 N = 1.000e+00 IS = 1.933e-13 
+EG = 1.216e+00 XTI = -1.559e-01 TRS = 3.705e-03 
+CJO = 2.126e-10 VJ = 4.748e-01 M = 5.619e-01 ) 
.ENDS 
