********************************
* Copyright:                   *
* Vishay Intertechnology, Inc. *
********************************
*Apr 11, 2016
*ECN S16-0605, Rev. A
*File Name: SiRA58DP_PS.txt and SiRA58DP_PS.lib
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT SiRA58DP D G S 
M1 3 GX S S NMOS W= 6920000u L= 0.30u 
M2 S GX S D PMOS W= 6920000u L= 0.16u 
R1 D 3 1.894e-03 TC=4.390e-03,1.864e-05
CGS GX S 2.400e-09 
CGD GX D 1.000e-13 
RG G GY 1m 
RTCV 100 S 1e6 TC=-1.361e-04,-3.598e-07
ETCV GX GY 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD S D DBD 6920000u 
**************************************************************** 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 5e-8 
+ RS = 0 KP = 1.664e-05 NSUB = 1.0762e+17 
+ KAPPA = 1.834e-01 NFS = 1.050e+11 
+ LD = 0 IS = 0 TPG = 1    )
*************************************************************** 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 5e-8 
+NSUB = 1.502e+16 IS = 0 TPG = -1    )
**************************************************************** 
.MODEL DBD D ( 
+FC = 0.1 TT = 9.897e-09 T_measured = 25 BV = 41
+RS = 9.254e-03 N = 1.103e+00 IS = 2.737e-12 
+EG = 1.176e+00 XTI = 3.623e-01 TRS1 = 4.603e-04
+CJO = 2.906e-10 VJ = 7.205e+00 M = 9.990e-01 ) 
.ENDS 
