*April 14, 2008
*Doc. ID: 68189, S-80733, Rev. A
*File Name: Si7192DP_PS.txt and Si7192DP_PS.lib
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product data sheet.  Designers should refer to the
*appropriate data sheet of the same number for guaranteed specification
*limits. 
.SUBCKT Si7192DP D G S
M1  3  GX S S NMOS W=13795655u L=0.25u      
M2  S  GX S D PMOS W=13795655u L=0.23u    
RG  G  GX     1.1
R1  D  3      RTEMP 6E-4
CGS GX S      3000E-12
DBD S  D      DBD
**************************************************************** 
.MODEL  NMOS        NMOS ( LEVEL  = 3           TOX    = 5E-8
+ RS     = 9E-4            RD     = 0           NSUB   = 2.5E17   
+ kp     = 1.9E-5          UO     = 650             
+ VMAX   = 0               XJ     = 5E-7        KAPPA  = 6E-2
+ ETA    = 1E-4            TPG    = 1  
+ IS     = 0               LD     = 0                             
+ CGSO   = 0               CGDO   = 0           CGBO   = 0 
+ TLEV   = 1               BEX    = -1.5        TCV    = 3.3E-3
+ NFS    = 0.8E12          DELTA  = 0.1)
**************************************************************** 
.MODEL  PMOS        PMOS ( LEVEL  = 3           TOX    = 5E-8
+NSUB    = 3E16            IS     = 0		TPG    = -1)   
**************************************************************** 
.MODEL DBD D (CJO=3000E-12 VJ=0.38 M=0.38
+FC=0.5 TT=2.28e-08 T_MEASURED=25 BV=31 
+RS=9.174e-04 N=1.046 IS=9.367e-12 IKF=1000
+EG=9.321e-01 XTI=1.063e+01 TRS1=2.393e-03 )
**************************************************************** 
.MODEL RTEMP RES (TC1=9E-3 TC2=5.5E-6)
**************************************************************** 
.ENDS