********************************
* Copyright:                   *
* Vishay Intertechnology, Inc. *
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*Apr 23, 2018
*ECN S18-0461, Rev. A
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT SiR188DP D G S 
M1 3 GX S S NMOS W= 5076250u L= 0.30u 
M2 S GX S D PMOS W= 5076250u L= 0.22u 
R1 D 3 2.007e-03 8.250e-03 1.000e-05 
CGS GX S 1.346e-09 
CGD GX D 1.000e-13 
RG G GY 0.90 
RTCV 100 S 1e6 3.120e-03 -.198e-04 
ETCV GX GY 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD S D DBD 5076250u 
************************************************ 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 7e-8 
+ RS = 0 KP = 7.597e-06 NSUB = 1.155e+17 
+ KAPPA = 4.32e-02 NFS = 1.000e+11 
+ LD = 0 IS = 0 TPG = 1 CAPOP = 12 ) 
************************************************ 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 7e-8 
+NSUB = 3.992e+15 IS = 0 TPG = -1 CAPOP = 12 ) 
************************************************ 
.MODEL DBD D ( 
+FC = 0.1 TT = 5.850e-08 TREF = 25 BV = 61 
+RS = 4.107e-03 N = 9.939e-01 IS = 1.000e-13 
+EG = 1.291e+00 XTI = -3.539e-01 TRS = 1.178e-02 
+CJO = 4.141e-10 VJ = 1.033e+01 M = 9.990e-01 ) 
.ENDS 
