********************************
* Copyright:                   *
* Vishay Intertechnology, Inc. *
********************************
*12-Nov-2018
*ECN S18-1137, Rev. A
*File Name: SUP70030E_PS.txt and SUP70030E_PS.lib
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT SUP70030E D G S 
M1 3 GX S S NMOS W= 27337500u L= 0.30u 
M2 S GX S D PMOS W= 27337500u L= 0.11u 
R1 D 3 1.920e-03 TC=6.942e-03,1.361e-05
CGS GX S 7.596e-09 
CGD GX D 1.008e-13 
RG G GY 1.7 
RTCV 100 S 1e6 TC=6.415e-05,1.081e-06
ETCV GX GY 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD S D DBD 27337500u 
**************************************************************** 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 7e-8 
+ RS = 0 KP = 2.409e-06 NSUB = 1.289e+17 
+ KAPPA = 1.038e-01 NFS = 1.187e+11 
+ LD = 0 IS = 0 TPG = 1    )
*************************************************************** 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 7e-8 
+NSUB = 3.142e+15 IS = 0 TPG = -1    )
**************************************************************** 
.MODEL DBD D ( 
+FC = 0.1 TT = 8.243e-08 T_measured = 25 BV = 101
+RS = 3.136e-02 N = 1.065e+00 IS = 8.037e-13 
+EG = 1.203e+00 XTI = 7.939e-01 TRS1 = 3.747e-03
+CJO = 2.721e-10 VJ = 6.745e+00 M = 1.000e+00 ) 
.ENDS 
