********************************
* Copyright:                   *
* Vishay Intertechnology, Inc. *
********************************
*13-Aug-2018
*ECN S18-0811, Rev. A
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT SiSH410DN D G S 
M1 3 GX S S NMOS W= 3586577u L= 0.25u 
M2 S GX S D PMOS W= 3586577u L= 2.252e-07 
R1 D 3 3.50e-03 3.568e-03 6.385e-06 
CGS GX S 9.539e-10 
CGD GX D 7.703e-11 
RG G GY 1.3
RTCV 100 S 1e6 5.841e-05 -2.562e-06 
ETCV GX GY 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD S D DBD 
************************************************* 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 5e-8 
+ RS = 0 KP = 1.936e-05 NSUB = 1.012e+17 
+ KAPPA = 1e-2 ETA = 2.831e-04 NFS = 5.796e+11 
+ XJ = 5.000e-12 LD = 0 IS = 0 TPG = 1) 
************************************************* 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 5e-8 
+NSUB = 2.897e+16 IS = 0 TPG = -1 ) 
************************************************* 
.MODEL DBD D ( 
+FC = 0.1 TT = 1.400e-08 TREF = 25 BV = 31 
+RS = 1.420e-03 N = 1.358e+00 IS = 2.428e-09 
+EG = 1.196e+00 XTI = 5.171e-01 TRS = 1.909e-03 
+CJO = 9.585e-10 VJ = 6.329e-01 M = 3.284e-01 ) 
.ENDS 
