ESD Protection - LLP75-6L
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Part Number ▲▼  | Circuit Diagram | Package (JEDEC®) Code ▲▼ | Reverse Standoff Voltage VRWM (V) ▲▼ | Reverse Current IR at VRWM (µA) ▲▼ | Reverse Breakdown Voltage VBR at 1 mA (V) ▲▼ | Peak Pulse Current IPPM at tp = 8/20μs acc. IEC 61000-4-5 (A) ▲▼ | Peak Pulse Power PPP at tp = 8/20μs acc. IEC 61000-4-5 (W) ▲▼ | Capacitance CD at VR = 0 V VAC < 100 mV f = 1 MHz (pF) ▲▼ | ESD Immunity acc. IEC 61000-4-2 (kV) ▲▼ | Number of Protected Lines ▲▼ | AEC-Q101 Qualified ▲▼ |
|---|---|---|---|---|---|---|---|---|---|---|---|
 |  Enlarge | LLP75-6L | 5 | 1 | 6 | 12 | 200 | 126 | ± 30 | 5 | No |
|  Enlarge | LLP75-6L | 5 | 0.1 | 6.3 | 3 | 45 | 0.8 | ± 15 | 4 | No |
|  Enlarge | LLP75-6L | 5.5 | 0.1 | 7 | 11 | 242 | 1.2 | ± 30 | 4 | No |
|  Enlarge | LLP75-6L | 5 | 0.1 | 6 | 2.5 | 33 | 13 | ± 15 | 5 | No |
